# 爾利效應

## 现象

• 由於基区变得更窄，电子与空穴复合的可能性更小。
• 若穿过基区的电荷梯度增加，那么注入基区的少子电流会增加。

## 大信号模型

$I_\mathrm{C} = I_\mathrm{S} e^{\frac{V_\mathrm{BE}}{V_\mathrm{T}}} \left(1 + \frac{V_\mathrm{CE}}{V_\mathrm{A}}\right)$
$\beta_\mathrm{F} = \beta_\mathrm{F0}\left(1 + \frac{V_\mathrm{CE}}{V_\mathrm{A}}\right)$

• $V_\mathrm{CE}$是集电极－发射极电压
• $V_\mathrm{T}$热电压$\mathrm{kT/q}$
• $V_\mathrm{A}$厄利电压（一般为15 V－150 V，对於小型设备会更小）
• $\beta_\mathrm{F0}$是零偏压时的正向共射极电流放大系数

## 小信号模型

$r_O=\frac{V_A+V_{CE}}{I_C} \ \approx \frac{V_A}{I_C} \$

$r_O=\frac{V_A +V_{CB}}{I_C} \$

$r_O = \begin{matrix} \frac {1+\lambda V_{DS}}{\lambda I_D} \end{matrix} =\begin{matrix} \frac {1/\lambda +V_{DS}} {I_D} \end{matrix}$,

## 参考文献

1. ^ R.C. Jaeger and T.N. Blalock. Microelectronic Circuit Design. McGraw-Hill Professional. 2004. 317. ISBN 0072505036.
2. ^ Massimo Alioto and Gaetano Palumbo. Model and Design of Bipolar and Mos Current-Mode Logic: CML, ECL and SCL Digital Circuits. Springer. 2005. ISBN 1402028784.
3. ^ Paolo Antognetti and Giuseppe Massobrio. Semiconductor Device Modeling with Spice. McGraw-Hill Professional. 1993. ISBN 0071349553.
4. ^ Orcad PSpice Reference Manual named PSpcRef.pdf, p. 209. This manual is included with the free version of Orcad PSpice, but they do not maintain a copy on line. If the link given here expires, try Googling PSpcRef.pdf.
5. ^ R.C. Jaeger and T.N. Blalock. Microelectronic Circuit Design Second Edition. McGraw-Hill Professional. 2004: Eq. 13.31, p. 891. ISBN 0-07-232099-0.
6. ^ NanoDotTek Report NDT14-08-2007, 12 August 2007 [1]