# 加法器

A B C S
0 0 0 0
1 0 0 1
0 1 0 1
1 1 1 0

## 全加器

A B Cin Cout S
0 0 0 0 0
1 0 0 0 1
0 1 0 0 1
1 1 0 1 0
0 0 1 0 1
1 0 1 1 0
0 1 1 1 0
1 1 1 1 1

${\displaystyle T_{FA}=2\cdot T_{XOR}=2\cdot 3D=6D}$

${\displaystyle T_{c}=2D}$

## 更複雜的加法器

### 波紋進位加法器（脈動進位加法器）

${\displaystyle T_{CRA}(n)=T_{HA}+(n-1)\cdot T_{c}+T_{s}=T_{FA}+(n-1)\cdot T_{c}=6D+(n-1)\cdot 2D=(n+2)\cdot 2D}$

${\displaystyle T_{CRA_{[0:c_{out}]}}=T_{HA}+n\cdot T_{c}=3D+n\cdot 2D}$

${\displaystyle T_{CRA_{[c_{0}:c_{n}]}}(n)=n\cdot T_{c}=n\cdot 2D}$

### 超前進位加法器

• 生成（Generate）訊號${\displaystyle G_{i}=x_{i}\cdot y_{i}}$
• 傳輸（Propagate）訊號：${\displaystyle P_{i}=x_{i}\oplus y_{i}}$

## 參考文獻

1. Stephen Brown, Zvonko Vranesic. Fundamentals of Digital Logic with Verilog Design. McGraw-Hill Education. ISBN 0-07-283878-7.
2. ^ Geoffrey A. Lancaster. Excel HSC Software Design and Development. Pascal Press. 2004: 180. ISBN 9781741251753.
3. ^ M. Morris Mano. Digital Logic and Computer Design. Prentice-Hall. 1979: 119-123. ISBN 0-13-214510-3.
4. 鄧元慶，關宇，賈鵬，石會. 數字設計基礎與應用. 清華大學出版社. ISBN 978-7-302-21406-9.
5. ^ Burgess, N. Fast Ripple-Carry Adders in Standard-Cell CMOS VLSI (PDF). 20th IEEE Symposium on Computer Arithmetic. 2011: 103–111.