邏輯仿真
外觀
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邏輯仿真(英語:logic simulation),或稱邏輯模擬,是對硬件描述語言所定義數字電路行為的預測與檢驗,通常可以利用計算機仿真實現。邏輯仿真可以在具有不同物理抽象層次(級別)下進行,例如晶體管級、邏輯門級、寄存器傳輸級和行為級。其基本原理是使用計算機軟件模擬一個激勵信號,然後觀察所設計電路的響應行為。[1]
參考文獻
[編輯]- ^ 鄧元慶,關宇,賈鵬,石會. 数字设计基础与应用(第2版). 清華大學出版社. : 253. ISBN 978-7-302-21406-9.
相關條目
[編輯]外部連結
[編輯]- Digital Logic Simulator v0.4 - Brad-Ware Studios' free program that supports real-time edit and simulation, as well as abstracting. Include entire scenes that you have created, as a single chip.
- Atanua is openGL based software for real time designing and simulating digital logic circuits (頁面存檔備份,存於網際網路檔案館)
- Hades – a framework for interactive, discrete-event based simulation.
- Simulo – Free Digital Logic Simulator (頁面存檔備份,存於網際網路檔案館)
- LogicCircuit – is educational software for designing and simulating digital logic circuits. (頁面存檔備份,存於網際網路檔案館)
- Deeds - free educational suite for digital logic circuit simulation and design, including finite state machines (FSM) and microprocessors simulation and design facilities.