至强融核

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集成众核架构 (MIC)
設計公司 Intel
指令集架構設計策略 扩展了x86/x64的众核设计
通用暫存器 x86-64寄存器
浮點寄存器 512位SIMD向量寄存器

至强融核(Xeon Phi)协处理器,是首款英特尔集成众核(Many Integrated Core,MIC)架构产品。[1]用作高性能计算(HPC)的超级计算机服务器的加速卡。最多72個处理器核心,每個核心擁有4個超線程,最多288個線程,超線程無法關閉。与之竞争的是GPGPU(通用图形处理器)在HPC領域应用的普及。英特尔至强融核协处理器提供了类似于英特尔至强处理器编程环境的通用编程环境。多个英特尔至强融核协处理器可安装在单个主机系统中,这些协处理器可通过 PCIe 对等互连相互通信,不受主机的任何干扰。

历史[编辑]

前身[编辑]

前身为2006年[2]英特尔宣布的研发产品Larrabee的众核架构(many core architecture),这是基于P5微架构内核,每核4路超线程,512位SIMD,内部环形数据总线,扩展的高速缓存一致性的众核系统。Larrabee用于GPU产品的开发于2010年5月终止。[3]

2009年开始的英特尔的Single-chip Cloud Computer英语Single-chip Cloud Computer多核微处理器原型,[4]这是用于云计算数据中心在单芯片上部署多核(原型为48核),硬件支持对每核的频率与电压控制以最大化能耗效用,还有mesh网络用于片间通信。该设计缺乏高速缓存一致性内核,主要用于使设计适用于很多核的情形。[5]

2007年披露的Teraflops Research Chip英语Teraflops Research Chip研究项目[6]是片上80核,每核2套浮点单元,非x86实现而是96位超长指令字架构。[7]该项目研究了核间通信方法、片上能耗管理,获得了1.01 TFLOPS在3.16 GHz功率62 W。[8][9]

至强融核的原型Knights Ferry[编辑]

英特尔 集成众核(Many Integrated Core,MIC)原型板,命名为Knights Ferry于2010年5月31日发布。该产品源于Larrabee项目与英特尔其他研究包括 Single-chip Cloud Computer[10][11]

该产品在一块PCIe板上布设了有序的32颗1.2 GHz处理器核心,每核4线程,2 GB GDDR5板上内存,[12],8 MB coherent L2高速缓存(每核256 KB以及32 KB L1代码高速缓存,32 KB L1数据高速缓存),功耗~300 W,[12],使用45 nm制程。[13]板上的Aubrey Isle内核控制 1,024位宽的环形总线(双向512位)连接各核与主内存。[14]单板性能超过750 GFLOPS。[13]原型板仅支持单精度浮点数指令。[15]

最初用户包括歐洲核子研究組織韓国科學技術情報研究院英语Korea Institute of Science and Technology Information莱布尼兹超级计算中心英语Leibniz Supercomputing Centre。硬件厂商包括IBM, SGI, HP, Dell等。[16]

第一代產品[编辑]

第一批至强融核的研发代號為Knights Corner,2011年公布,使用22纳米制程3维三栅极结构晶体管[10][13]继承了Larrabee的每核4路SMT线程,512位SIMD单元,32KB L1 指令cache,32KB L1数据cache,一致的L2cache(每核512 KB),每个核心专用的二级高速缓存由全局分布的 (global-distributed) 标签目录(TD)保持完全一致;16套内存控制器均匀分布在环上,连接片上的GDDR5内存;PCIe客户端逻辑通过PCIe IO部件连接主机内存;所有这些组件都由带宽极高的双向环形总线互连在一起,其中数据环是单向512位带宽,还有双向的地址环(发送读/写命令和内存地址)与确认环(发送流控制和一致性消息),由于模拟实验证实地址环与确认环会在32个核心并行时饱和,最终设计是在每个方向使用2个地址环和2个确认环。英特尔众核架构的计算核心是基于修改版的P54C设计,最初用于Pentium(即80586),指令流水顺序执行,提供4路超线程,该x86架构的电路实现只占内核面积的2%。[17] 这利用了x86的技术创造了x86兼容的多核架构可利用已有的并行软件工具。[13]至强融核协处理器核心的一个重要组件是矢量处理单元 (VPU),包括一种新型的512位SIMD指令集,其正式名称为英特尔® 初始众核指令集(英特尔® IMCI)。VPU每周期可执行16路单精度或8路双精度浮点运算。VPU还支持融合乘-加 (FMA) 指令,还可提供整数支持。VPU 还包括扩展数学单元 (EMU),它可执行超越运算,如倒数、平方根和对数,从而支持高带宽矢量式执行这些运算。EMU 通过计算这些函数的多项式近似值进行运算。

L2高速缓存的一致性问题:当某个核心访问它的L2高速缓存发现缺失时,地址请求会通过地址环形总线发送至各核心的标签目录(distributed Tag Directory)。每个核心及标签目录通过一个总线控制器(ring stop)与环形总线项连。如果请求的数据块位于另一个核心的L2高速缓存中,那么转发请求会通过地址环形总线发送至该核心的L2高速缓存,随后在数据环形总线上传输该数据块给发出请求的核心的L2高速缓存。如果请求的数据并未存在于任何核心的L2高速缓存中,那么最初的核心将请求的内存地址发送给协处理器的各个内存控制器。

电源管理:一个核心的4条超线程全部停止,该核心立即进入C1节电状态;在任何时间,都可关闭或开启任意数量核心的电源。当所有核心未检测到活动,标签目录、互连、二级高速缓存和内存控制器都转入节电状态C6。主机驱动程序可让该协处理器处于更深度的睡眠状态或空闲状态,其中所有非核心的电源开启,GDDR 处于自我刷新模式,PCIe 逻辑处于唤醒的等待状态,GDDR-IO部件的功耗极低。

程序设计工具包括OpenMPOpenCL[18]Cilk/Cilk Plus与英特尔的专门版的Fortran, C++编译器[19]与数学库。[20]Knights Corner指令集的文档可从英特尔网站获得。[21][22][23]

不計客户定製化產品,至强融核第一代共有3100/5100/7100等型號,分別有57/60/61個核心及6GB/8GB/16GB的片上GDDR5記億體,1 TFlops/1.01 TFlops/1.2TFlops双精度浮点计算,240/320/352 GB/sec的内存带宽,300W/225W/300W的TDP功耗。[24][25][26]每款型號按散熱器的不同,包括主動式、被動式和沒有散熱器,主動式(A)指有風扇,被動式(P)則只有一塊很大的散熱片,沒有散熱器(X)需要配合水冷使用。

研究者的评测表明,至强融核发挥其计算效力需要简单的数据结构与高度并行;如果编译器驱动的并行或向量化失败,则难以在至强融核上编程。[27]

2011年6月,SGI宣布利用英特尔的众核架构开发高性能计算产品。[28]

2011年9月,得克萨斯先进计算中心 (TACC)英语Texas Advanced Computing Center宣布用Knights Corner加速卡建成了10 petaFLOPS "Stampede"超级计算机,提供8 petaFLOPS计算能力。[29] 该超级计算机还将使用下一代的Knights Landing众核加速卡把峰值计算速度提升为至少15 PetaFLOPS"。[30][31]

2012年6月18日在汉堡召开的国际超级计算大会英语International Supercomputing Conference上,英特尔宣布把众核架构的系列处理器家族的商品名为英特尔志强融核[32][33][34][32][35][36][37][38]

The Xeon Phi uses the 22 nm process size.[24][25][26] The Xeon Phi 3100 will be priced at under US$2,000 while the Xeon Phi 5110P will have a price of US$2,649 and Xeon Phi 7120 at US$4129.[24][25][26] On June 17, 2013, the Tianhe-2 supercomputer was announced[39] by TOP500 as the world's fastest. It uses Intel Ivy Bridge Xeon and Xeon Phi processors to achieve 33.86 petaFLOPS.

2012年11月12日,英特尔正式宣布至强融核产品在2013年上半年开始上市销售,5100P售价2149$,3100售价2000$。具有类似CPU的编程能力,可使用与其他英特尔至强E5处理器的编程语言、开发工具、技术与并行模型。[40][24][25][26]在绿色500强列表中使用该产品的一个系统成为最有功率效能的计算机。[41][42][43]

2012年6月5日,英特尔发布了关于Knights Corner的开源软件与文档。[44]

2012年6月,Cray公司宣布在Cascade系统上使用22 nm制程的Knight's Corner加速卡。[45][46]

2012年6月,ScaleMP英语ScaleMP发布了使用Knight's Corner的虚拟化软件,允许Knight's Corner执行老的MMX/SSE指令并访问无线的主机内存。[47]

2013年6月,国家超级计算广州中心发布天河二号成为世界最快的超级计算机。[39]使用了英特尔的Ivy Bridge 微架构的至强E5 2692v2型号的12核处理器与至强融核31S1P的57核协处理器,获得了33.86 petaFLOPS。[48]

產品列表[编辑]

Xeon Phi
X100 系列
訂購代碼 核心數
(執行緒)
時脈 (MHz) L2
快取
記憶體 雙精度浮點運算效能峰值(GFLOPS) TDP
(W)
散熱方式 封裝方式 發表時間 發售價格(美金)
基礎時脈 Turbo時脈 系統 通道數 頻寬(GB/s)
Xeon Phi 3110X[49] SE3110X 061 (244) 1053 - 30.5 MB 06 GB
GDDR5 ECC
6x
Dual Channel
240 1028 300 Bare Board PCIe 2.0 x16 Card  ???  ???
08 GB 8x 320
Xeon Phi 3120A[50] SC3120A 057 (228) 1100 - 28.5 MB 06 GB 6x 240 1003 300 Fan/Heatsink June 17, 2013 $1695
Xeon Phi 3120P [51] SC3120P 057 (228) 1100 - 28.5 MB 06 GB 6x 240 1003 300 Passive Heatsink June 17, 2013 $1695
Xeon Phi 31S1P[52] BC31S1P 057 (228) 1100 - 28.5 MB 08 GB 8x 320 1003 270 Passive Heatsink June 17, 2013 $1695
Xeon Phi 5110P[53] SC5110P 060 (240) 1053 - 30,0 MB 08 GB 8x 320 1011 225 Passive Heatsink Nov 12, 2012 $2649
Xeon Phi 5120D[54] SC5120D 060 (240) 1053 - 30,0 MB 08 GB 8x 352 1011 245 Bare Board SFF 230-Pin Card June 17, 2013 $2759
BC5120D
Xeon Phi SE10P[55] SE10P 061 (244) 1100 - 30.5 MB 08 GB 8x 352 1074 300 Passive Heatsink PCIe 2.0 x16 Card Nov. 12, 2012 ???
Xeon Phi SE10X[56] SE10X 061 (244) 1100 - 30.5 MB 08 GB 8x 352 1074 300 Bare Board Nov. 12, 2012 ???
Xeon Phi 7110P[57] SC7110P 061 (244) 1250  ??? 30.5 MB 16 GB 8x 352 1220 300 Passive Heatsink ??? $5399 ?
Xeon Phi 7110X[58] SC7110X 061 (244) 1250  ??? 30.5 MB 16 GB 8x 352 1220 300 Bare Board ??? $5399 ?
Xeon Phi 7120A[59] SC7120A 061 (244) 1238 1333 30.5 MB 16 GB 8x 352 1208 300 Fan/Heatsink April 6, 2014 $4235
Xeon Phi 7120D[60] SC7120D 061 (244) 1238 1333 30.5 MB 16 GB 8x 352 1208 270 Bare Board SFF 230-Pin Card March ??, 2014 $4235
Xeon Phi 7120P[61] SC7120P 061 (244) 1238 1333 30.5 MB 16 GB 8x 352 1208 300 Passive Heatsink PCIe 2.0 x16 Card June 17, 2013 $4129
Xeon Phi 7120X[62] SC7120X 061 (244) 1238 1333 30.5 MB 16 GB 8x 352 1208 300 Bare Board June 17, 2013 $4129

第二代产品[编辑]

第二代至强融核的研发代號Knights Landing,[30]使用14 nm制程英语14 nanometer,2013年6月17日公布。[48]有两种形式:协处理器与主处理器。Knights Landing最多有72颗Airmont英语Airmont (microarchitecture)(Atom)内核,每核4线程,[63][64]最大支持384 GB of DDR4 RAM与8–16 GB of stacked 3D MCDRAM。每核有2个512位向量单元,支持AVX-512F (AVX3.1) SIMD指令与英特尔AVX-512 Conflict Detection Instructions (CDI), Intel AVX-512 Exponential and Reciprocal Instructions (ERI), Intel AVX-512 Prefetch Instructions (PFI), 以及全套的x86指令集除了Transactional Synchronization Extensions英语Transactional Synchronization Extensions指令。[65] Knights Landing的TDP为160至215 W。

產品列表[编辑]

Xeon Phi
7200 系列
訂購編號 核心數
(執行緒)
時脈 (MHz) L2
快取
記憶體 雙精度浮點運算效能峰值 TDP
(W)
腳位 發表時間 產品編號 發售價格(美金)
基礎時脈 Turbo時脈 類型 頻寬(GB/s)
Xeon Phi 7210[66] SR2ME (B0) 64 (256) 1300 1500 32 MB
16 GB 8-Channel 3D MCDRAM;
384 GB 6-channel DDR4-2133
400+ GB/s MCDRAM; 102,4 GB/s DDR4
2662
GFLOPS
215
SVLCLGA3647
June 20,
2016
HJ8066702859300 $2438
SR2X4 (B0)
Xeon Phi 7210F[67] SR2X5 (B0) 230 HJ8066702975000 $2707
Xeon Phi 7230[68] SR2MF (B0) 215 HJ8066702859400 $3710
SR2X3 (B0)
Xeon Phi 7230F[69] SR2X2 (B0) 230 HJ8066702269002 $4039
Xeon Phi 7250[70] SR2MD (B0) 68 (272) 1400 1600 34 MB 3046
GFLOPS[71]
215 HJ8066702859200 $4876
SR2X1 (B0)
Xeon Phi 7250F[72] SR2X0 (B0) 230 HJ8066702268900 $5260
Xeon Phi 7290[73] SR2WY (B0) 72 (288) 1500 1700 36 MB 3456
GFLOPS
245 HJ8066702974700 $6254
Xeon Phi 7290F[74] SR2WZ (B0) 260 HJ8066702975200 $6703

第三代产品[编辑]

第三代众核产品的代号为Knights Hill,英特尔在超级计算14(SC14)上首次发布细节。采取10 nm制程,包含60至72颗基于Silvermont Atom改进版的核心,每核4路超线程。[75]期待2017年上市销售。

竞争产品[编辑]

参见[编辑]

参考文献[编辑]

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